Xiangyu Chang
Community@xchang1121 · United States
A Ph.D student @ University of California, Riverside
Agent Skills by Xiangyu Chang
Showing 142 vetted skills indexed across 2 GitHub repositories.
xchang1121catlass-api-basics
Explains CATLASS five-layer API and Gemm template assembly for Ascend NPU kernel development.
xchang1121catlass-hardware-constraints
Validates CATLASS TileShape selections against Ascend on-chip buffer capacity budgets.
xchang1121catlass-epilogue-composition
Compose CATLASS matmul epilogues for fused elementwise operators on Ascend hardware.
xchang1121catlass-matmul-optimization
Tune CATLASS GEMM kernels via DispatchPolicy, tile shapes, and swizzle configuration.
xchang1121tilelang-cuda-gemm
Generates and optimizes TileLang CUDA GEMM kernels using swizzling, pipelining, and autotuning techniques.
xchang1121triton-ascend-a5-api
Documents Cube/Vector co-programming APIs for Triton kernels on Atlas A5 hardware.
xchang1121triton-ascend-case-vector-elemwise-bench-atlas-a5
Recommends faster Triton API replacements for vector elementwise kernels on Atlas A5.
xchang1121triton-ascend-case-vector-elemwise-bench-atlas-a2
Recommends faster Triton API substitutions for vector elementwise kernels on Atlas A2.
xchang1121triton-ascend-case-vector-elemwise-bench-atlas-a3
Recommends faster Triton API replacements for vector elementwise kernels on Atlas A3.
xchang1121triton-ascend-case-vector-mask-i32
Converts i1 comparison masks to int32 for efficient vectorized logical operations on Ascend.
xchang1121triton-ascend-case-matmul-large-k
Optimizes large-K matrix multiplication on Ascend hardware using Split-K parallelization and workspace reduction.
xchang1121triton-ascend-affinity-fix
Diagnose and fix Cube/Vector affinity bugs in Triton-Ascend kernels on Ascend hardware.
xchang1121triton-ascend-verify-diagnose
Diagnoses Triton Ascend kernel verification failures from verifier precision logs and error distributions.
xchang1121triton-ascend-kahan-precision-fix
Fixes large-K reduction precision errors in Triton-Ascend kernels using Kahan compensated summation.
xchang1121triton-ascend-a5-matmul-vector
Guides Cube/Vector fused MatMul kernel optimization on Ascend A5 hardware.
xchang1121triton-ascend-a5-attention
Guides serial Cube/Vector optimization of Flash Attention kernels on Ascend950 hardware.
xchang1121triton-ascend-example-attention
Implements serial Cube/Vector Flash Attention forward kernel in Triton-Ascend for Ascend A5 hardware.
xchang1121triton-ascend-example-matmul-vector
Implements MatMul plus vector post-processing fusion kernels in Triton-Ascend for Ascend A5 hardware.
xchang1121ascendc-tiling-design
Guides tiling design for Ascend C operators across Reduction, Elementwise, and Broadcast patterns.
xchang1121ascendc-hardware-tiling
Guides AscendC kernel tiling design covering UB/L1/L0 capacity, DataCopy alignment, and block/tail computation.
xchang1121ascendc-direct-invoke
Defines the AscendC direct-invoke project contract for building NPU operators with CMake and torch.ops.npu.
xchang1121ascendc-api-best-practices
Guides correct usage of Ascend C kernel APIs including arithmetic, reduce, data copy, buffer, and pipeline synchronization.
xchang1121ascendc-localtensor-subviews
Diagnose and fix illegal LocalTensor subview offsets causing UB out-of-bounds errors in AscendC kernels.
xchang1121ascendc-ub-budget
Calculates AscendC Unified Buffer byte budgets to prevent UB out-of-bounds kernel failures.
Frequently Asked Questions About Xiangyu Chang
FAQPage SchemaWhat tasks can I accomplish with xchang1121's kernel skills?▼
You can generate, verify, and optimize deep-learning operator kernels: Triton/CUDA/TileLang kernels for NVIDIA GPUs, Triton-Ascend, AscendC, and CATLASS kernels for Atlas A2/A3/A5 NPUs, plus x64/ARM CPU SIMD vectorization, KernelBench task extraction, and performance metric aggregation.
Who should use these kernel development skills?▼
Performance engineers, compiler/kernel developers, and ML systems researchers targeting PyTorch or MindSpore operators on CUDA GPUs and Ascend NPUs. The skills assume familiarity with GPU memory hierarchies, tiling, and operator semantics such as matmul, softmax, layernorm, and attention.
How do the Ascend A5 Cube/Vector affinity skills work in practice?▼
They guide two-stage scheduling: a Cube scope runs matmul via bl.alloc/fixpipe, then a Vector scope applies bias, ReLU, or online softmax, coordinated by explicit sync_block_set/wait events. Example skills provide complete runnable Flash Attention and MatMul+ReLU fusion implementations for Ascend950.
What prerequisites and hardware do these skills require?▼
Skills target specific backends: CUDA GPUs for Triton/TileLang/CUDA C paths, and Huawei Atlas A2, A3, or A5 (Ascend950) NPUs for Triton-Ascend, AscendC, and CATLASS paths. Frameworks referenced include PyTorch (load_inline, torch.ops.npu) and MindSpore custom operator registration.
How do the debugging and verification skills diagnose kernel failures?▼
They parse verifier precision reports with hard/outlier thresholds and per-dimension error distributions to isolate mask, index, boundary, or NaN/Inf root causes. AscendC skills add plog crash analysis, UB out-of-bounds detection, Kahan compensated summation for large-K reductions, and profiling-based bound classification.