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triton-ascend-case-vector-mask-i32

Converts i1 comparison masks to int32 for efficient vectorized logical operations on Ascend.

6|1|Updated Apr 19, 2026
Search Tags:#vectorization#attention#triton#mask#ascend#kernel optimization#int32
One-click install
npx skills add https://github.com/xchang1121/op-autoresearch --skill triton-ascend-case-vector-mask-i32-xchang1121
Or copy as Structured Prompt for Agent▼
Please help me install this Agent Skill.
Skill: triton-ascend-case-vector-mask-i32
Source: https://github.com/xchang1121/op-autoresearch/tree/main/skills/triton-ascend/evolved-improvement/triton-ascend-case-vector-mask-i32
Command: npx skills add https://github.com/xchang1121/op-autoresearch --skill triton-ascend-case-vector-mask-i32-xchang1121

SYSTEM DOCUMENTATION & REQUIREMENTS

What problem does it solve? When building multi-segment boolean masks in Triton kernels on Ascend hardware, combining arith.cmpi i1 results with &/| forces the backend to insert extra extui/trunci and select operations for width alignment, degrading generated code quality. ## Core Features & Use Cases - Mask dtype guidance: Instructs converting each comparison result to tl.int32 immediately with .to(tl.int32) so the whole mask stays in 0/1 int32 form. - Backend-friendly lowering: Enables the Ascend backend to emit continuous vand.i32/vor.i32 vector instructions instead of i1 alignment shims. - Use Case: In an attention kernel combining causal masks (q_off <= k_off) with attention-argument equality checks via & and |, apply this pattern so each comparison segment is cast to int32 before the logical combination fed to tl.where. ## Quick Start Rewrite my Triton attention mask so each comparison result is cast with .to(tl.int32) before combining segments with & and | operators.

Frequently Asked Questions about triton-ascend-case-vector-mask-i32

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I optimize boolean mask operations in Triton on Ascend?▼

Cast each comparison result to tl.int32 immediately with .to(tl.int32) before combining segments with & or |. This keeps the entire mask in int32 0/1 form so the Ascend backend emits vand.i32/vor.i32 vector instructions directly.

Why does combining i1 comparison results generate extra instructions on Ascend?▼

arith.cmpi produces i1 tensors, and performing andi/ori on tensor<i1> forces the backend to insert arith.extui and arith.trunci operations to align widths with the int32 values used later in arith.select. Explicit int32 casts remove this alignment overhead.

Does this mask pattern work with tl.where in Triton attention kernels?▼

Yes, the int32 0/1 mask can be passed directly to tl.where since mask semantics only require 0/1 values. The int32 dtype naturally comes from the comparison operands such as offsets or attention arguments.

When should I not convert comparison masks to int32 in Triton?▼

Avoid the conversion when masks are single comparisons without & or | combination, since no multi-segment logical lowering occurs. The pattern targets cases where several i1 results are merged before a final select or where.

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