triton-ascend-a5-attention

What problem does it solve? Writing high-performance attention kernels for Ascend950 (A5) hardware requires coordinating Cube and Vector cores, managing on-chip memory buffers, and handling ND-to-NZ format conversion, which is error-prone without hardware-specific guidance. ## Core Features & Use Cases - Cube/Vector Serial Scheduling: Maps Flash Attention's four stages (QK matmul, softmax, PV matmul, flash update) onto Cube and Vector cores with explicit sync_block_set/wait event pairing. - On-Chip Data Flow Design: Covers al.fixpipe, bl.alloc, al.copy, and bl.to_tensor usage across L0C, UB, and L1 memory tiers with ROW_SPLIT sub-vector partitioning. - P Matrix ND-to-NZ Conversion: Details reshape and permute steps to convert softmax output into NZ fractal format on L1 for the PV matmul. - Use Case: When porting a Triton Flash Attention kernel to Ascend950, follow this guide to structure the kernel with correct buffer shapes, synchronization events, and the required disable_auto_inject_block_sync compile option. ## Quick Start Ask the agent to optimize a Triton attention kernel for Ascend950 using the A5 serial Cube/Vector guide, applying the fixpipe data flow and manual sync events described in this skill.