tilelang-ascend-example-reduction

Implements a row reduction kernel using TileLang Ascend Expert mode with double-buffered pipelining.

6|1|Updated Apr 19, 2026
One-click install
npx skills add https://github.com/xchang1121/op-autoresearch --skill tilelang-ascend-example-reduction-xchang1121
Or copy as Structured Prompt for Agent▼
Please help me install this Agent Skill.
Skill: tilelang-ascend-example-reduction
Source: https://github.com/xchang1121/op-autoresearch/tree/main/skills/tilelang-ascend/examples/tilelang-ascend-example-min
Command: npx skills add https://github.com/xchang1121/op-autoresearch --skill tilelang-ascend-example-reduction-xchang1121

SYSTEM DOCUMENTATION & REQUIREMENTS

💡 This Skill requires tilelang.

What problem does it solve? Writing efficient reduction operators (reduce_min, reduce_max, reduce_sum) on Ascend NPU hardware requires manual management of UB memory, vector core synchronization, and data movement pipelining, which is error-prone without a proven reference implementation. ## Core Features & Use Cases - Expert Mode Pipeline Pattern: Demonstrates manual T.Scope("V") vector core control combined with T.barrier_all() synchronization for deterministic kernel behavior. - Double-Buffered Data Movement: Uses stages = 2 UB allocation so the current block's reduction computation overlaps with the next block's data copy. - Multi-Core Parallelism: Splits work across two vector cores (VEC_NUM = 2) with sub_M sub-block tiling for row-wise reduction. - Use Case: When generating a reduce-type operator for Atlas A2 or Atlas A3 hardware, reference this example's code structure to implement a reduce_min kernel over an M x N tensor producing an M-length output. ## Quick Start Ask the agent to generate a TileLang Ascend row reduction kernel for your operator following the reduce_min double-buffered pipeline example.

Frequently Asked Questions about tilelang-ascend-example-reduction

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I write a reduction kernel in TileLang for Ascend NPU?▼

Use T.alloc_ub to allocate UB buffers, T.reduce_min or T.reduce_sum for the reduction along the last dimension, and T.copy for data movement between global memory and UB. In Expert mode, wrap compute in T.Scope("V") and synchronize with T.barrier_all().

How to implement double-buffered pipelining in TileLang Ascend?▼

Allocate UB tensors with a leading stages dimension set to 2, then alternate buffers with cur = mm % stages and nxt = (mm + 1) % stages. Prefetch the next block with T.copy while reducing the current block so data movement overlaps computation.

Does TileLang Ascend support reduce_max and reduce_sum?▼

Yes, the same pipeline structure works with T.reduce_max and T.reduce_sum by swapping the reduction primitive. The example uses T.reduce_min over dim=-1, but the double-buffering and synchronization pattern is identical for other reduction operations.

What are the shape constraints for this TileLang reduction kernel?▼

M must be an integer multiple of block_M and N must be an integer multiple of block_N. For non-divisible shapes, apply padding beforehand or switch to Developer mode using T.ceildiv for boundary handling.

Which Ascend hardware supports this TileLang reduction example?▼

The example targets Atlas A2 and Atlas A3 hardware using the ascendc JIT target. It compiles through tilelang.jit with target="ascendc" and runs on the vector cores with VEC_NUM set to 2.