tilelang-ascend-api

Provides a complete TileLang Ascend API reference for writing NPU kernels.

6|1|Updated Apr 19, 2026
One-click install
npx skills add https://github.com/xchang1121/op-autoresearch --skill tilelang-ascend-api-xchang1121
Or copy as Structured Prompt for Agent▼
Please help me install this Agent Skill.
Skill: tilelang-ascend-api
Source: https://github.com/xchang1121/op-autoresearch/tree/main/skills/tilelang-ascend/fundamentals/tilelang-ascend-api
Command: npx skills add https://github.com/xchang1121/op-autoresearch --skill tilelang-ascend-api-xchang1121

SYSTEM DOCUMENTATION & REQUIREMENTS

What problem does it solve? Writing kernels for Ascend NPUs with TileLang requires knowing dozens of memory allocation, data movement, compute, scheduling, and synchronization primitives; this Skill consolidates the full API reference so you can write correct kernels without hunting through scattered documentation. ## Core Features & Use Cases - Complete API Reference: Covers kernel definition (@T.prim_func, T.Kernel, @jit), memory allocation (shared, fragment, UB, L0A/L0B/L0C), data movement (T.copy paths), GEMM/MMA, reductions, element-wise ops, and T.tile extension primitives. - Scheduling & Synchronization Guidance: Documents T.Pipelined intra-core and inter-core pipelines, T.Persistent scheduling, and flag/barrier synchronization primitives with pass_configs. - Use Case: When implementing a Flash Attention or GEMM kernel on Ascend, look up the exact signature and constraints of T.gemm_v0, T.reduce_max, or T.tile.atomic_add, including supported dtypes, memory hierarchy rules, and working code examples. ## Quick Start Ask the AI to show the correct TileLang Ascend API usage and constraints for the kernel operation you are implementing, such as a pipelined GEMM or a softmax reduction.

Frequently Asked Questions about tilelang-ascend-api

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I write a GEMM kernel with TileLang on Ascend NPU?▼

Use T.gemm_v0 with A and B allocated in shared/L1 memory and C in fragment/L0C memory, copying tiles with T.copy inside a loop. Set init=True on the first iteration to clear the accumulator, and wrap copies in T.Pipelined with num_stages=2 to overlap data movement with compute.

What is the difference between T.alloc_shared and T.alloc_ub in TileLang Ascend?▼

T.alloc_shared is Developer mode where the compiler automatically maps to L1 or UB, while T.alloc_ub is Expert mode that explicitly targets the Unified Buffer for vector computation. Use Developer mode for portability and Expert mode when you need precise memory hierarchy control.

Does TileLang Ascend support atomic add operations?▼

Yes, T.tile.atomic_add accumulates a local UB or L0C tile into a GM destination, supporting int8, int16, float16, bfloat16, int32, and float32. The destination must be a GM buffer and the source a local tensor with matching dtype; it does not support return_prev or constant sources.

How do I enable inter-core pipelining between Cube and Vector cores?▼

Use T.Pipelined with num_stages and enable the pass configs TL_ASCEND_AUTO_CV_COMBINE and tl.ascend_auto_cross_core_sync. Note that inter-core and intra-core pipelining cannot be enabled simultaneously, and synchronization uses T.set_cross_flag and T.wait_cross_flag.

What are the limitations of T.reduce_sum and T.reduce_max on Ascend?▼

These fast-path reductions support 1D buffers on axis 0, 2D buffers on axes 0/1/-1/-2, and 3D buffers only on trailing-tile axes. Invalid dim, real_shape, or output shape values raise frontend errors rather than silently passing to the backend.

When should I use T.Parallel versus T.tile primitives for element-wise ops?▼

T.Parallel with symbolic APIs like T.exp is the recommended cross-platform approach for element-wise computation. T.tile primitives like T.tile.exp directly trigger hardware instructions and suit Expert mode or mixed-mode kernels needing precise control.