What problem does it solve? Closing timing, power, and area targets in IC design often devolves into guesswork: a change is applied and the same agent that proposed it declares success. This Skill produces structured, falsifiable PPA optimization proposals where every candidate carries an actuator, a predicted effect, a named remeasurement, and a rollback, so no improvement is ever claimed without independent measurement. ## Core Features & Use Cases - Falsifiable candidate proposals: Each move names the actuator (e.g., placement density 0.62 to 0.58), the predicted effect in metric-record units, the remeasurement scope, and the exact rollback state. - Pareto frontier ranking: Candidates are ranked on the power-performance-area frontier without collapsing to a single weighted score, so it stays visible which axis paid. - Deterministic verdict boundary: The proposal never issues a pass/fail; verdicts belong to deterministic programs (_ppa/feasibility.py, _ppa/pareto.py) after ppa-measure re-reads the artefacts. - Use Case: A designer misses setup timing by 0.124 ns at post_route_extracted. The Skill emits candidates such as loosening placement density or raising synthesis effort, each with predicted WNS delta, remeasurement plan, rollback, and iteration budget, ready for a closure controller to actuate. ## Quick Start Ask the assistant to propose PPA optimization candidates for the current design given the baseline ppa-measure records, the missed timing target, and a budget of six PnR iterations.
