Fixes post-CTS and post-route hold violations by inserting buffers and delay cells.
npx skills add https://github.com/vibeic/vibe-ic --skill hold-fix-vibeic
Please help me install this Agent Skill. Skill: hold-fix Source: https://github.com/vibeic/vibe-ic/tree/main/vibe-ic-marketplace/plugins/vibe-ic/skills/hold-fix Command: npx skills add https://github.com/vibeic/vibe-ic --skill hold-fix-vibeic
repair_timing -hold through guarded Tcl generators. - Deterministic guardrails: Enforces a 5% area budget cap, forbids trading setup for hold, verifies FF-corner coverage, and gates every iteration through convergence and admission checks. - Use Case: After CTS completes on a GF180MCU design with WHS of -180 ps across 87 endpoints, run this Skill to insert hold buffers iteratively until WHS is positive, THS is zero, and setup timing remains clean. ## Quick Start Fix the hold violations in my post-CTS database and iterate until hold slack is clean at the fast corner without degrading setup timing.High-intent search queries and answers about installing and using this skill.
Run STA at the fast (FF) corner with report_checks -path_delay min, then insert buffers or delay cells on short paths using OpenROAD repair_timing -hold. Iterate fix and re-check until worst hold slack is non-negative and total hold slack is zero.
CTS adds clock insertion delay (skew), so data launched and captured by nearby flops arrives too early relative to the delayed capture clock. Short data paths then violate the hold requirement T_hold < T_clk_skew + T_data_delay.
The fast (FF) corner with high voltage and low temperature is worst for hold, because minimum cell delays make short paths fastest. Hold must be verified clean at FF before tapeout signoff.
Some PDKs ship multi-input delay-line cells like DLY4D1 that OpenROAD's buffer heuristic mistakenly selects, then asserts on the extra input pins. Work around it by applying set_dont_use to those masters before running repair_timing -hold.
Yes, inserted buffers add delay that can hurt setup-critical paths sharing the same route. Always re-run setup checks at the SS corner after hold fixing, and never enable -allow_setup_violations when repairing hold.
Hold buffers typically cost 2-5% of total cell area, and this Skill caps the budget at 5% via an enforced checker. If the budget is exceeded, investigate CTS imbalance or over-skewed clock trees instead of inserting more buffers.
KishoreDamamDefine and validate SDC/XDC timing constraints for FPGA/ASIC flows.
KishoreDamamDiagnose STA setup/hold violations by mapping report_timing fields to the slack equation.
jvalinskyAudits Objective-C OAuth and DPoP implementations for protocol conformance and vulnerabilities.
DVNghiemEnforce architectural constraints from CONSTRAINTS.md during code edits and PRs.