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gf-learn

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Master SystemVerilog with interactive exercises.

Software Engineering#verification#learning#exercises#systemverilog#hardware design#rtl design
AuthorRedClaus
Version1.0.0
Installs0

System Documentation

What problem does it solve?

This Skill provides an interactive platform for learning and practicing SystemVerilog, offering exercises, solution checking, and hints to guide users through complex topics.

Core Features & Use Cases

  • Topic-based Exercises: Generate learning modules for various SystemVerilog concepts like FSMs, FIFOs, and protocols.
  • Solution Review: Submit your code for automated review and receive constructive feedback.
  • Progressive Hints: Get tailored hints to overcome challenges without revealing the full solution.
  • Use Case: A junior hardware engineer can use this Skill to practice designing a synchronous FIFO, receive feedback on their implementation, and get hints if they get stuck, accelerating their learning curve.

Quick Start

Start a SystemVerilog learning session on the 'fsm' topic.

Dependency Matrix

Required Modules

None required

Components

scriptsreferences

💻 Claude Code Installation

Recommended: Let Claude install automatically. Simply copy and paste the text below to Claude Code.

Please help me install this Skill:
Name: gf-learn
Download link: https://github.com/RedClaus/cortex/archive/main.zip#gf-learn

Please download this .zip file, extract it, and install it in the .claude/skills/ directory.
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