power-electronics

Model DC/DC converters with CCM/DCM boundaries and loss estimation in C++.

Updated Apr 7, 2026
One-click install
npx skills add https://github.com/lgili/skillex --skill power-electronics
Or copy as Structured Prompt for Agent▼
Please help me install this Agent Skill.
Skill: power-electronics
Source: https://github.com/lgili/skillex/tree/main/skills/power-electronics
Command: npx skills add https://github.com/lgili/skillex --skill power-electronics

SYSTEM DOCUMENTATION & REQUIREMENTS

💡 This Skill includes references (resource) components.

What problem does it solve?

This skill provides structured guidance and reference material for building and analyzing discrete-time power-electronics converter models, including accurate CCM/DCM boundaries, state-space averaging, and loss estimation in a C++ simulator.

Core Features & Use Cases

  • Supports modeling of buck, boost, buck-boost, flyback, LLC, and DAB converters with explicit CCM/DCM handling, and small-signal transfer functions.
  • Includes references on converter topologies, CCM/DCM analysis, and small-signal models to validate simulations.
  • Useful for design verification, academic study, and tooling for simulation-based optimization.

Quick Start

Initialize a starter converter model in the simulator and validate CCM/DCM behavior.

Frequently Asked Questions about power-electronics

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I model CCM and DCM boundaries for DC/DC converters in a C++ simulator?▼

You model CCM/DCM boundaries for DC/DC converters by applying state-space averaging techniques within a C++ simulator to ensure accurate discrete-time converter behavior. This approach validates topology performance across non-isolated and isolated variants.

What is state-space averaging and how does it apply to small-signal analysis?▼

State-space averaging is a modeling technique that linearizes switched-mode converter behavior to derive small-signal transfer functions. It enables accurate stability analysis and controller design for topologies like buck, boost, and LLC converters.

How do I estimate power electronics losses including ESR, DCR, and Rds_on parasitics?▼

You estimate power electronics losses by including parasitic resistances like ESR, DCR, and Rds_on directly in your converter models. This parasitic inclusion allows precise loss accounting and performance optimization across buck, boost, and DAB topologies.

Can I simulate isolated converter topologies like flyback, LLC, and DAB with this approach?▼

Yes, you can simulate isolated converter topologies like flyback, LLC, and DAB. The modeling approach explicitly handles both non-isolated and isolated variants, providing accurate loss estimation and small-signal analysis for design verification.

What is the best way to validate small-signal transfer functions for power converters?▼

The best way to validate small-signal transfer functions is to use reference materials on CCM/DCM analysis alongside state-space averaging in a C++ simulator. This ensures consistent simulation results for design verification and academic study.

Why do my converter simulation results mismatch expected CCM and DCM behavior?▼

Converter simulations mismatch expected CCM and DCM behavior when state-space averaging lacks precise boundary handling or ignores parasitic elements. Including Rds_on, ESR, and DCR ensures accurate loss estimation and consistent transfer functions.