io-ring-orchestrator

What problem does it solve?

This Skill automates the complex and error-prone process of generating IO Rings for semiconductor designs, ensuring accurate schematic and layout creation, and robust verification.

Core Features & Use Cases

• End-to-End Workflow: Manages the entire IO Ring generation process from input analysis to DRC/LVS verification.
• Process Node Support: Handles both T28 and T180 process nodes using a unified T180 workflow pattern.
• Use Case: When designing a new chip, use this Skill to automatically generate the IO ring configuration, including signal classification, device mapping, pin assignment, and schematic/layout generation, significantly reducing manual effort and potential errors.

Quick Start

Use the io-ring-orchestrator skill to generate an IO ring for T180 with signals MCLK, CDCKB, VDCK, GDCK, VDBS, GDBS, VINP, AVSS, AVDD, a 2x2 ring size, and clockwise placement.