gf-sim

Community

Compile and run SystemVerilog simulations.

AuthorRedClaus
Version1.0.0
Installs0

System Documentation

What problem does it solve?

This Skill automates the compilation and execution of SystemVerilog simulations, providing structured output for easier integration with orchestration tools.

Core Features & Use Cases

  • Automated Compilation: Compiles SystemVerilog code using Verilator, automatically detecting DUT and testbench files.
  • Simulation Execution: Runs the compiled simulation and captures its output.
  • Structured Results: Returns a standardized result block indicating simulation status (PASS/FAIL/ERROR), error counts, and details.
  • Use Case: Integrate this Skill into a CI/CD pipeline to automatically verify SystemVerilog designs upon code commits, providing immediate feedback on simulation success or failure.

Quick Start

Compile and run the SystemVerilog simulation for the provided DUT and testbench files.

Dependency Matrix

Required Modules

None required

Components

scriptsreferences

💻 Claude Code Installation

Recommended: Let Claude install automatically. Simply copy and paste the text below to Claude Code.

Please help me install this Skill:
Name: gf-sim
Download link: https://github.com/RedClaus/cortex/archive/main.zip#gf-sim

Please download this .zip file, extract it, and install it in the .claude/skills/ directory.
View Source Repository

Agent Skills Search Helper

Install a tiny helper to your Agent, search and equip skill from 223,000+ vetted skills library on demand.