cpu-cache-opt

Reduce CPU cache misses by measuring with perf stat, interpreting L1/L2/LLC miss rates, and restructuring hot data using AoS to SoA transformations, struct splitting, or padding to eliminate false sharing.

False sharing degrades multithreaded performance when separate threads write to variables sharing a cache line, fixable by applying struct padding or alignment to separate hot data across cache boundaries.

Measure cache miss rates by running perf stat to collect cache-references and cache-misses counters, then inspect L1, L2, and LLC breakdowns to identify hotspot access patterns and quantify miss rates.

Use AoS to SoA data layout optimization for memory-bound loops and compute kernels like particle systems to improve cache line utilization and reduce wasted bandwidth during sequential access patterns.

Cache optimization targets concurrent counters, matrix kernels, and particle systems in C, C++ and Rust, applying prefetching, blocking, and tiling strategies to improve throughput and reduce latency.

Cache-aware algorithm design uses software prefetching to load data before access and blocking or tiling to fit working sets within cache levels, minimizing L1, L2, and LLC misses in compute kernels.