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ascendc-operator-design

Generate AscendC operator design documents with tiling and performance plans.

31|1|Updated Mar 28, 2026
Search Tags:#design#documentation#kernel#tiling#operator#code-gen#AscendC
One-click install
npx skills add https://github.com/Ascend/agent-skills --skill ascendc-operator-design
Or copy as Structured Prompt for Agent▼
Please help me install this Agent Skill.
Skill: ascendc-operator-design
Source: https://github.com/Ascend/agent-skills/tree/main/skills/ascendc-operator-design
Command: npx skills add https://github.com/Ascend/agent-skills --skill ascendc-operator-design

SYSTEM DOCUMENTATION & REQUIREMENTS

What problem does it solve?

AscendC operator design requires assembling architecture, interfaces, tiling, and performance planning into a cohesive design document. This skill guides users through extracting requirements and generating a production-ready design.md, designed for code-gen workflows.

Core Features & Use Cases

  • Generate complete operator design documents from requirements, including interfaces, tiling strategies, and performance plans.
  • Provide reference design templates and guidelines to ensure consistency with existing design standards and code-gen inputs.
  • Support end-to-end workflows from requirements gathering through to a ready-to-use design.md and a preliminary tiling data structure draft.

Quick Start

Describe your operator concept and requirements, and this Skill will generate a complete design document.

Frequently Asked Questions about ascendc-operator-design

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I generate an AscendC operator design document from requirements?▼

An AscendC operator design document defines architecture, interfaces, tiling strategies, and performance plans to ensure consistency with design standards and provide inputs for code-gen workflows.

How does tiling data structure planning work for AscendC kernels?▼

Tiling data structure planning for AscendC kernels applies tiling principles and UB/resource constraints to your operator specifications, outputting a preliminary tiling data structure draft alongside the main design document.

What is the best way to plan memory and performance considerations for AscendC kernels?▼

The best way to plan memory and performance considerations for AscendC kernels is to enforce references to design templates and UB/resource constraints during the operator design document generation process.

Do I need to provide operator specifications to generate a tiling plan?▼

Yes, you need to provide operator specifications so the system can apply tiling principles and UB/resource constraints, generating both a complete design.md and a preliminary tiling data structure.

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